OS Subject for STC students during June-July 2026

 I am going to handle OS subject for STC  students of 2026 June- July. The syllabus Details: 

IA 1 Portion

Contents: Unit-I System Structures : Introduction, OS Services, User and Operating System Interface, System calls ,Types of System Calls, System Programs, Operating System Design and Implementation, Operating System Structures, Process Scheduling: Process concept, Process scheduling, Operation on processes, cooperating processes, Inter process communication, Communication in client /server system CPU scheduling- Basic concepts, scheduling criteria, scheduling algorithms. 12 Hrs 

Unit-II Synchronization: The Critical section problem, Peterson’s Solution Synchronization hardware, Mutex locks, Semaphores, problems of synchronization, Critical regions, Monitors, Deadlock - System model, Deadlock characterization, Methods for handling deadlocks - Deadlock prevention, deadlock avoidance, Deadlock detection and solution for deadlock, Recovery from deadlock. 12 Hrs 

IA 2 Portion

Unit-III Main Memory Management Strategies: Overview, Main memory managementBackground, Swapping, Contiguous allocation, Paging, Segmentation, Segmentation with paging, Structure of Page table. 10 Hrs 

Unit-IV Virtual memory: Background, Demand paging, Process creation, Copy on Write, Page replacement algorithms, Allocation of frames, thrashing, Memory mapped files. File System : File concept, Access methods, Directory structure, File system mounting, File Sharing, Protection, File system structure, file system implementation, Directory implementation, Allocation methods and free space management. 10 Hrs

IA 3 Portion

Unit 4 and Unit 5 

Unit-V Mass storage structures: Disk structure, Disk Attachment Disk scheduling methods, Disk management, Swap space management. I/O Systems: I/O hardware, Application I/O interface, Kernel I/O sub system. 08 Hrs

CTA Activitiy - Assignment Questions/ Question Bank

o   Unit 1
·         Detail how modern operating systems are designed. Compare and contrast different architectural models, specifically focusing on Simple structures, Monolithic kernels, Microkernels, and Layered approaches. Highlight their relative advantages and disadvantages regarding performance, extensibility, and security.

 

·         Define a system call and explain its critical role in transitioning an operating system from user mode to kernel mode. List and explain the six major categories of system calls as classified
·         Describe the Process State model and outline the information stored in a Process Control Block (PCB). Explain the need for cooperating processes and detail the mechanisms of Interprocess Communication (IPC), explicitly contrasting Shared Memory systems with Message Passing systems.
·         Define the primary criteria used to evaluate CPU scheduling algorithms (e.g., CPU utilization, throughput, turnaround time, waiting time, response time). Explain how FCFS (First-Come, First-Served), SJF (Shortest-Job-First), and Round Robin scheduling algorithms work, and discuss their pros and cons in dynamic workloads
·         Describe the Priority Scheduling algorithm and the issue of starvation, along with the technique of aging used to resolve it. Further, explain how Multilevel Queue and Multilevel Feedback Queue scheduling algorithms function to balance interactive and batch processing.
o   Unit 2
·   Define the Critical-Section problem and detail its three strict requirements: Mutual Exclusion, Progress, and Bounded Waiting.
·    Explain Peterson’s Solution for two processes. Prove mathematically how it satisfies all three requirements.
·         Discuss how Semaphores (binary and counting) work to achieve process synchronization.
·         Illustrate their practical application by detailing the solution to either the Bounded-Buffer (Producer-Consumer) Problem or the Readers-Writers Problem, using standard semaphore primitives.
·         Explain why low-level tools like Mutex locks and Semaphores are prone to timing errors.
·         Describe the structure and syntax of a Monitor. Detail how condition variables (wait() and signal() operations) handle process suspension and resumption inside a monitor
·         Define a deadlock using the standard System Model.
·         List and explain the four necessary conditions that must hold simultaneously for a deadlock to occur.
·         Discuss how Deadlock Prevention strategies eliminate deadlocks by systematically violating at least one of these four conditions.
·         Differentiate between a Safe State and an Unsafe State in a system.
·         Explain the mechanics of the Banker's Algorithm for resource allocation in a multi-instance resource system. Outline both the Safety Algorithm and the Resource-Request Algorithm.
·         Describe how an operating system detects deadlocks using a Wait-For Graph (for single-instance resources) and a detection algorithm (for multi-instance resources).
·         Explain the various options for Deadlock Recovery, highlighting the trade-offs between Process Termination (aborting all vs. aborting one-by-one) and Resource Preemption (rollback and starvation challenges).
o   Unit 3
·         Explain the concept of Contiguous Memory Allocation and how memory protection is enforced using base and limit registers.
·         Compare the three dynamic storage-allocation strategies: First-fit, Best-fit, and Worst-fit, highlighting their trade-offs in execution speed and storage utilization.
·     Define Fragmentation (both internal and external) and discuss how Compaction and Swapping are used to mitigate it
· Describe the core philosophy of Paging and how it permits the physical address space of a process to be non-contiguous.
·  Illustrate with a neat architectural diagram how a logical address (consisting of page number p and offset d) is translated into a physical address using a Page Table.
·         Explain the hardware implementation of a page table, specifically focusing on how a Translation Lookaside Buffer (TLB) improves performance, and define the concept of TLB hit ratio.
·         Discuss Segmentation as a memory-management scheme that supports the user's view of memory. Detail the components of a Segment Table (base and limit values).
·         Evaluate the hybrid approach of Segmentation with Paging (used in systems like MULTICS and Intel architecture). Explain how it combines the logical benefits of segments with the physical efficiency of pages.
·         Explain why a simple, linear page table becomes prohibitively large in modern 32-bit and 64-bit architectures.
·         Detail the design, address translation process, and pros/cons of the following three architectural solutions:Hierarchical (Multilevel) Paging, Hashed Page Tables, Inverted Page Tables
 o   Unit 4
·         Define the concept of Virtual Memory and how Demand Paging implements it using a valid-invalid bit scheme.
·         Provide a neat, step-by-step diagram illustrating the handling of a Page Fault, detailing the interaction between the CPU, page table, and backing store.
·         Explain the role of Copy-on-Write (COW) during process creation via the fork() system call.
·         Explain the purpose of page replacement when no free frames are available in main memory.
·         Describe the logic behind the FIFO (First-In, First-Out), Optimal, and LRU (Least Recently Used) page-replacement algorithms.
·         Illustrate Belady’s Anomaly using the FIFO algorithm with a specific reference string to show how increasing frames can increase page faults.
·         Differentiate between Equal Allocation and Proportional Allocation strategies for distributing frames among active processes.
·         Define Thrashing and detail its root causes (such as high degrees of multiprogramming and lack of local frame allocation).
·         Explain how the operating system mitigates thrashing using the Working-Set Model and Page-Fault Frequency (PFF) strategies.
·         Define a File Concept and explain the properties of different file access methods (Sequential Access and Direct Access).
·         Compare different directory layout structures: Single-Level, Two-Level, Tree-Structured, and Acyclic-Graph Directories, explaining how they manage naming conflicts and file sharing.
·         Briefly explain File System Mounting and Protection mechanisms (Access Control Lists)
·         Detail the design, structural layout, and hardware access characteristics of the three main file allocation techniques:Contiguous Allocation (including issues with external fragmentation).Linked Allocation (including the use of the File-Allocation Table (FAT)).Indexed Allocation (including multi-level index schemes like Unix inodes).
o   Compare these methods based on storage efficiency and sequential/random access performance
·         Unit 5
·         Explain how directories are implemented at the lower layer using a Linear List versus a Hash Table, outlining the performance trade-offs of each.
o   Explain the physical structure of a magnetic disk drive (including platters, tracks, sectors, and cylinders).
·         Describe the logic behind the following disk-scheduling algorithms, highlighting how they attempt to minimize disk arm seek time:

FCFS (First-Come, First-Served)

SSTF (Shortest Seek Time First)

SCAN and C-SCAN

LOOK and C-LOOK

·         Explain the process of Disk Management, detailing Low-Level Formatting, Logical Formatting (Partitioning), and Boot Block initialization.
·         Discuss how an operating system handles Bad Blocks using sector sparing and sector forwarding.
·         Describe the purpose of Swap-Space Management. Compare how swap space is implemented as a raw partition versus a file within a standard file system, and discuss its impact on performance
·         Detail the core structural components of I/O hardware: Buses, Controllers, and I/O Ports.
·         Compare and contrast the following three data-transfer techniques between the processor and the I/O device controller:

Polling (Programmed I/O)

Interrupt-Driven I/O (including the interrupt-vector table mechanism)

Direct Memory Access (DMA) (explaining how it bypasses the CPU for bulk transfers)